View MAX16961RAUEAV_9088861.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

max16961 3a, 2.2mhz, synchronous step-down dc-dc converter general description the max16961 is a high-efficiency, synchronous step- down converter that operates with a 2.7v to 5.5v input voltage range and provides a 0.8v to 3.6v output voltage range. the wide input/output voltage range and the ability to provide up to 3a to load current make this device ideal for on-board point-of-load and post-regulation applica - tions. the device achieves -3.7%/+2.6% output error over load, line, and temperature ranges. the device features a 2.2mhz fixed-frequency pwm mode for better noise immunity and load transient response, and a pulse-frequency modulation mode (skip) for increased efficiency during light-load operation. the 2.2mhz frequency operation allows for the use of all- ceramic capacitors and minimizes external components. the optional spread-spectrum frequency modulation minimizes radiated electromagnetic emissions. integrated low r dson switches improve efficiency at heavy loads and make the layout a much simpler task with respect to discrete solutions. the device can be offered with factory-preset output volt - ages, or with an adjustable output voltage (contact factory for preset output-voltage options). factory-preset output- voltage versions allow customers to achieve -3.7%/+2.6% output-voltage accuracy without using external resistors, while the adjustable output-voltage version provides the flexibility to set the output voltage to any desired value between 0.8v to 3.6v using an external resistive divider. additional features include 8ms soft-start, 16ms power- good output delay, overcurrent, and overtemperature protections. the max16961 is available in thermally enhanced 16-pin tssop-ep and 16-pin (4mm x 4mm) tqfn-ep packages, and is specified for operation over the -40 n c to +125 n c automotive temperature range. benefits and features s small external components ? 2.2mhz operating frequency s ideal for point-of-load applications ? 3a maximum load current ? adjustable output voltage: 0.8v to 3.6v ? 2.7v to 5.5v operating supply voltage s high efficiency at light load ? 26a skip mode quiescent current s minimizes electromagnetic interference ? programmable sync i/o pin ? operates above am-radio band ? available spread spectrum s low power mode saves energy ? 1a shutdown current s open-drain power-good output s limits inrush current during startup ? soft-start s overtemperature and short-circuit protections s 16-pin tssop-ep and 16-pin (4mm x 4mm) tqfn-ep packages s -40c to 125c operating temperature range applications automotive infotainmentpoint-of-load applications industrial/military typical application circuit 19-6520; rev 5; 6/15 ordering information appears at end of data sheet. max16961 outs pv1 lx1 pgnd1 pg ep pgnd2 lx2 0.47h 47f 20k 10 4.7f 1f v pv1 v out1 pv2 gnd pv en v pv v out1 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim?s website at www.maximintegrated.com. downloaded from: http:///
max16961 3a, 2.2mhz, synchronous step-down dc-dc converter 2 maxim integrated pv, pv1, pv2 to gnd .............................................. -0.3v to +6v en, pg to gnd ....................................................... -0.3v to +6v pgnd1 and pgnd2 to gnd .............................. -0.3v to +0.3v lx1, lx2 continuous rms current (lx1 connected in parallel with lx2) ...................................4a lx current (lx1 connected in parallel with lx2)..... q 6a (note 5) all other pins voltages to gnd .. (v pv + 0.3v) to (v gnd - 0.3v) output short-circuit duration .................................... continuous continuous power dissipation (t a = +70 n c) tqfn (derate 25mw/ n c above +70 n c)................... 2000mw* tssop (derate 26.1mw/ n c above +70 n c)........... 2088.8mw* operating temperature range ........................ -40 n c to +125 n c junction temperature ..................................................... +150 n c storage temperature range ............................ -65 n c to +150 n c lead temperature (soldering, 10s) ................................ +300 n c soldering temperature (reflow) ...................................... +260 n c tqfn junction-to-ambient thermal resistance ( b ja ) .......... 40 n c/w junction-to-case thermal resistance ( b jc ) ................. 6 n c/w tssop junction-to-ambient thermal resistance ( b ja ) .... 38.3 n c/w junction-to-case thermal resistance ( b jc ) .............. 3 n c/w absolute maximum ratings note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four-layer board. for detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial . stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratings only, and functional opera - tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. package thermal characteristics (note 1) electrical characteristics (v pv = v pv1 = v pv2 = 5v, v en = 5v, t a = t j = -40c to +125c, unless otherwise noted. typical values are at t a = +25c.) (note 2) * as per jedec51 standard (multilayer board). parameter symbol conditions min typ max units supply voltage range v pv normal operation 2.7 5.5 v supply current i pv no load, v pwm = 0v 12 26 45 f a shutdown supply current i shdn v en = 0v, t a = +25 c 1 5 f a undervoltage-lockout threshold low v uvlo_l 2.37 v undervoltage-lockout threshold high v uvlo_h 2.6 v undervoltage-lockout hysteresis 0.07 v synchronous step-down dc-dc converter fb regulation voltage v outs 800 mv feedback set-point accuracy v outs i load = 4a -3 0 +3 % i load = 0a -0.5 +2 +3 pmos on-resistance r dson_p v pv1 = 5v, i lx_ = 0.4a, lx1 in parallel with lx2 34 55 m i nmos on-resistance r dson_n v pv1 = 5v, i lx_ = 0.8a, lx1 in parallel with lx2 25 45 m i maximum pmos current-limit threshold i limp1 lx1 and lx2 shorted together 3.9 5.1 6.3 a downloaded from: http:///
max16961 3a, 2.2mhz, synchronous step-down dc-dc converter 3 maxim integrated electrical characteristics ( continued) (v pv = v pv1 = v pv2 = 5v, v en = 5v, t a = t j = -40c to +125c, unless otherwise noted. typical values are at t a = +25c.) (note 2) parameter symbol conditions min typ max units maximum output current i out (v out + 0.5v p v pv1 p 5.5v) (note 3) 3.3 a outs bias current i b_outs fixed output voltage variants 1 2 5 f a adjustable output version -1 +1 lx_ leakage current i lx_leak v pv_ = 5v, lx_ = pgnd_ or pv_, t a = +25 c -1 +1 f a minimum on-time t on_min 60 ns lx discharge resistance r lx v en = 0v, through the outs pin 15 24 55 i maximum short-circuit current 7.8 a oscillator oscillator frequency f sw internally generated 2.0 2.2 2.4 mhz spread spectrum d f/f spread spectrum enabled +6 % sync input frequency range f sync 50% duty cycle (note 4) 1.7 2.4 mhz thermal overloadthermal-shutdown threshold +165 c thermal-shutdown hysteresis 15 c power-good output (pg) pg overvoltage threshold pg ovth percentage of nominal output 106 110 114 % pg undervoltage threshold pg uvth percentage of nominal output 90 92 94 % pg timeout period 16 ms undervoltage-/overvoltage-propagation delay 28 f s output high leakage current t a = +25 c 0.2 f a pg output low voltage i sink = 3ma 0.4 v v pv = 1.2v, i sink = 100 f a 0.4 enable inputs (en) input voltage high v inh input rising 2.4 v input voltage low v inl input falling 0.5 v input hysteresis 0.85 v input current v en = high 0.1 1.0 2 f a pulldown resistor v en = low 50 100 200 k i digital inputs (pwm, sync as input) input voltage high v inh 1.8 v input voltage low v inl 0.4 v input voltage hysteresis 50 mv pulldown resistor 50 100 200 k i downloaded from: http:///
max16961 3a, 2.2mhz, synchronous step-down dc-dc converter 4 maxim integrated typical operating characteristics (v pv = v pv1 = 5v, v en = 5v, t a = +25c, unless otherwise noted.) electrical characteristics ( continued) (v pv = v pv1 = v pv2 = 5v, v en = 5v, t a = t j = -40c to +125c, unless otherwise noted. typical values are at t a = +25c.) (note 2) note 2: all limits are 100% production tested at +25c. limits over temperature are guaranteed by design. note 3: calculated value based on an assumed inductor current ripple of 30%. note 4: for sync frequency outside (1.7, 2.4) mhz, contact factory. note 5: lx_ has internal clamp diodes to pgnd_ and in_. applications that forward bias these diodes should take care not to exceed the ic?s package power dissipation limits. parameter symbol conditions min typ max units digital output (sync as output) output-voltage low v ol i sink = 3ma 0.4 v output-voltage high v oh v pv = 5v, i source = 3ma 4.2 v efficiency vs. load current (pwm) max16961 toc01 i load (a) efficiency (%) 1.0000 0.1000 0.0100 10 20 30 40 50 60 70 80 90 100 0 0.0010 10.0000 v in = 3.3v v out = 1.2v v out = 1.8v v out = 2.5v efficiency vs. load current (pwm) max16961 toc02 load current (a) 1.0000 0.1000 0.0100 0.0010 10.0000 efficiency (%) 10 20 30 40 50 60 70 80 90 100 0 v out = 1.2v v out = 3.3v v out = 1.8v v in = 5v efficiency vs. load current (skip) max16961 toc03 load current (a) 1.000 0.100 0.010 0.001 0 10.000 efficiency (%) 10 20 30 40 50 60 70 80 90 100 0 v out = 1.2v v out = 3.3v v out = 1.8v v in = 5v efficiency vs. load current (skip) max16961 toc04 load current (a) efficiency (%) 1.0000 0.1000 0.0100 0.0010 10 20 30 40 50 60 70 80 90 100 0 0.0001 10.0000 v in = 3.3v v out = 2.5v v out = 1.8v v out = 1.2v v out load regulation (pwm) max16961 toc05 i load (a) regulation (%) 2.5 2.0 1.5 1.0 0.5 -3.00-3.50 -2.50 -1.50-2.00 -0.50-1.00 0 0.50 -4.00 0 3.0 v in = 5v v out = 3.3v t a = +25c t a = +125c t a = -40c v out load regulation (skip) max16961 toc06 i load (a) regulation (%) 2.5 2.0 1.5 1.0 0.5 -5 -4 -3 -2 -1 0 1 -6 03 .0 v in = 5v v out = 3.3v t a = +25c t a = +125c t a = -40c downloaded from: http:///
max16961 3a, 2.2mhz, synchronous step-down dc-dc converter 5 maxim integrated typical operating characteristics (t a = +25c, unless otherwise noted.) v out vs. v pv (pwm) max16961 toc07 v pv (v) v out (v) 5.1 4.7 3.9 4.3 3.5 3.1 1.76 1.77 1.78 1.79 1.80 1.81 1.82 1.83 1.84 1.851.75 2.7 5.5 t a = +25c t a = -40c t a = +125c i load = 0a i pv vs. v pv (skip) max16961 toc08 v pv (v) i pv (a) 5.0 4.5 4.0 3.5 3.0 15 20 25 30 35 4010 2.5 5.5 v pwm = 0v v en1 = v en2 = v pv v out1 = v out2 = 0.8v t a = +125c t a = +25c t a = -40c i pv vs. temperature (skip) max16961 toc09 temperature (c) i pv (a) 110 95 -25 -10 53 5506 5 20 80 2422 26 28 30 32 3634 38 4020 -40 125 v pv = 5v v pwm = 0v v en1 = v pv v out = 0.9v load-transient response (pwm) max16961 toc10 3.0a0.30a 0a 50mv/div v out ac-coupled i load 100s/div v in = 3.3v f sw vs. temperature max16961 toc11 temperature (c) f sw (mhz) 110 95 65 80 -10 52 0355 0 -25 2.02 2.04 2.06 2.08 2.10 2.12 2.14 2.16 2.18 2.202.00 -40 125 v in = 5v pwm mode shdn current vs. v pv max16961 toc12 v pv (v) shdn (na) 5.0 4.5 4.0 3.5 3.0 0.01 0.1 1 10 100 1000 0.001 2.5 5.5 t a = -40c t a = +25c t a = +125c downloaded from: http:///
max16961 3a, 2.2mhz, synchronous step-down dc-dc converter 6 maxim integrated pin configurations pin descriptions pin name function tqfn tssop 1 3 lx2 switching node 2. lx2 is high impedance when the converter is off. 2 4 pgnd2 power ground 2 3 5 pgnd1 power ground 1 4 6 lx1 switching node 1. lx1 is high impedance when the converter is off. 5 7 pv1 input supply 1. bypass pv1 with at least a 4.7 f f ceramic capacitor to pgnd1. connect pv1 to pv2 for normal operation. 6 8 en enable input. drive en high to enable the converter. drive en low to disable the converter. 7 9 outs feedback input (adjustable output option only). connect an external resistive divider from v out to outs and gnd to set the output voltage. see figure 2. 8 10 pg power-good output. open-drain output. pg asserts when v out drops below 8% or rises above 10% of the nominal output voltage. connect to a 20k i pullup resistor. 9, 13?15 1, 11, 15, 16 gnd ground 10 12 pwm pwm control input. drive pwm high to put the converters in forced-pwm mode. drive pwm low to put the converters in skip mode. 11 13 sync factory-set sync input or output. as an input, sync accepts a 1.7mhz to 2.4mhz external clock signal. as an output, sync outputs a 90 phase-shifted signal with respect to internal oscillator. 1516 14 13 65 7 pgnd2 lx1 8 lx2 syncgnd pv 12 gnd 4 12 11 9 gnd pv2 pgouts en pv1 + pgnd1 pwm 3 10 gnd tqfn (4mm x 4mm) top view + tssop 13 4 sync pgnd2 14 3 pv lx2 15 2 gnd pv2 16 1 gnd gnd 10 7 pg pv1 11 6 gnd lx1 9 8 outs en 12 5 pwm pgnd1 ep ep top view max16961 max16961 downloaded from: http:///
max16961 3a, 2.2mhz, synchronous step-down dc-dc converter 7 maxim integrated pin descriptions (continued) detailed description the max16961 is a high-efficiency, synchronous step-down converter that operates with a 2.7v to 5.5v input voltage range and provides a 0.8v to 3.6v output voltage range. the device delivers up to 3a of load current and achieves -3.7%/+2.6% output error over load, line, and temperature ranges. the pwm input forces the device into either a fixed- frequency, 2.2mhz pwm mode or a low-power pulse- frequency modulation mode (skip). optional spread- spectrum frequency modulation minimizes radiated electromagnetic emissions due to the switching frequency. the factory-programmable synchronization i/o (sync) enables system synchronization. integrated low r dson switches help improve efficiency at heavy loads and make the layout a much simpler task with respect to discrete solutions. the device is offered with factory-preset output voltages that achieve -3.7%/+2.6% output-voltage accuracy without using external resistors. in addition, the output voltage can be set to any desired values between 0.8v to 3.6v using an external resistive divider with the adjustable option. additional features include 8ms soft-start, 16ms power- good delay output, overcurrent, and overtemperature protections. see figure 1 . power-good output (pg) the device features an open-drain power-good output that asserts when the output voltage drops 8% below or rises 10% above the regulated voltage. pg remains asserted for a fixed 16ms timeout period after the output rises up to its regulated voltage. connect pg to outs with a 20k i resistor. soft-start the device includes an 8ms fixed soft-start time. soft-start time limits startup inrush current by forcing the output voltage to ramp up over time towards its regulation point. spread-spectrum option the device featuring spread-spectrum (ss) operation varies the internal operating frequency up by ss = 6% relative to the internally generated operating frequency of 2.2mhz (typ). this function does not apply to externally applied oscillation frequency. the internal oscillator is frequency modulated with a 6% frequency deviation. see the selector guide for available options. synchronization (sync) sync is a factory-programmable i/o. see the selector guide for available options. when sync is configured as an input, a logic-high on pwm enables sync to accept signal frequency in the range of 1.7mhz < f sync < 2.4mhz. when sync is configured as an output, a logic-high on pwm enables sync to output a 90 n phase- shifted signal with respect to internal oscillator. current-limit/short-circuit protection the device features current limit that protects the device against short-circuit and overload conditions at the out - put. in the event of a short-circuit or overload condition, the high-side mosfet remains on until the inductor current reaches the high-side mosfet?s current-limit threshold. the converter then turns on the low-side mosfet to allow the inductor current to ramp down. once the inductor current crosses the low-side mosfet current-limit threshold, the converter turns on the high- side mosfet for minimum on-time period. this cycle repeats until the short or overload condition is removed. pin name function tqfn tssop 12 14 pv device supply voltage input. bypass with at least a 1 f f ceramic capacitor to gnd. in addition, connect a 10 i decoupling resistor between pv and the bypass capacitor. 16 2 pv2 input supply 2. bypass pv2 with at least a 4.7 f f ceramic capacitor to pgnd2. connect pv2 to pv1 for normal operation. ? ? ep exposed pad. connect ep to a large-area contiguous copper ground plane for effective power dissipation. do not use ep as the only ic ground connection. ep must be connected to gnd. downloaded from: http:///
max16961 3a, 2.2mhz, synchronous step-down dc-dc converter 8 maxim integrated figure 1. internal block diagram fpwm/skip modes the device features an input (pwm) that puts the converter either in skip mode or forced-pwm (fpwm) mode of operation. see the pin descriptions section for mode details. in fpwm mode, the converter switches at a constant frequency with variable on-time. in skip mode, the converter?s switching frequency is load-dependent until the output load reaches the skip threshold. at higher load current, the switching frequency does not change and the operating mode is similar to the fpwm mode. skip mode helps improve efficiency in light-load applications by allowing the converters to turn on the high-side switch only when needed to maintain regulation. as such, the converter does not switch mosfets on and off as often as is the case in the fpwm mode. consequently, the gate charge and switching losses are much lower in skip mode. overtemperature protection thermal overload protection limits the total power dissipa - tion in the device. when the junction temperature exceeds +165c (typ), an internal thermal sensor shuts down the internal bias regulator and the step-down controller, allowing the ic to cool. the thermal sensor turns on the ic again after the junction temperature cools by 15c. max16961 control logic step-down skip current comp current-sense amp peak current comp ramp generator pmw comp current lim comp error amp fpwm p1-ok zero-crossing comp outs sync en p1-ok pwm pv clk pv1 pv1pv2 lx1 lx2 pgnd2 pgnd1 pg gnd pgnd clk clkfpwm power-good comp soft-start generator v ref voltage reference th-sd feedback driver osc. main control logic trim bits v ref otp pv pgnd downloaded from: http:///
max16961 3a, 2.2mhz, synchronous step-down dc-dc converter 9 maxim integrated applications information setting the output voltage connect outs to v out for factory-programmed out - put voltage (see the selector guide ). to set the output to other voltages between 0.8v and 3.6v, connect a resistive divider from output (v out ) to outs to gnd ( figure 2 ). select r2 (outs to gnd resistor) less than or equal to 100k i . calculate r1 (v out to outs resistor) with the following equation: ?? ? ? = ? ?? ? ? ?? ? ? ?? ? + out outs v r1 r2 1 v r1 r2 where 7.5k r1 r2 where v outs = 800mv (see the electrical characteristics table). the external feedback resistive divider must be frequency compensated for proper operation. place a capacitor across each resistor in the resistive-divider network. use the following equation to determine the value of the capacitors: ?? = ???? r2 c1 1 0pf r1 inductor selection three key inductor parameters must be specified for operation with the max16961: inductance value (l), inductor saturation current (i sat ), and dc resistance (r dcr ). use the following formulas to determine the minimum inductor value: ( ) =? out_ min in out_ in op v 3 l vv ( ) v f 3a where f op is the operating frequency. this value is 2.2mhz unless externally synchronized to a different frequency. the next equation ensures that the inductor current downslope is less than the internal slope compensation. for this to be the case, the following equation needs to be satisfied: ? m2 m 2 where m2 is the inductor current downslope: ???? ?? out v l and -m is the slope compensation: ?? ?? ?? max 0.8 xi s solving for l: = min2 out s lv 1.6 3a the equation that provides the bigger inductor value must be chosen for proper operation: l min = max(l min1 , l min2 ) the maximum inductor value recommended is twice the chosen value from the above formula. l max = 2 x l min figure 2. adjustable output voltage setting table 1. inductor values vs. (v in - v out ) v in - v out (v) 5.0 to 3.3 5.0 to 2.5 5.0 to 1.5 3.3 to 0.8 inductor (h) 0.8 0.6 0.47 0.33 max16962 outs r1r2 c1 v out downloaded from: http:///
max16961 3a, 2.2mhz, synchronous step-down dc-dc converter 10 maxim integrated the maximum inductor value must not exceed the calculated value from the above formula. this ensures that the current feedback loop receives the correct amount of current ripple for proper operation. input capacitor the input filter capacitor reduces peak currents drawn from the power source and reduces noise and voltage ripple on the input caused by the circuit?s switching. the input capacitor rms current requirement (i rms ) is defined by the following equation: out pv1 out rms load(max) pv1 v( v v) ii v ? = i rms has a maximum value when the input voltage equals twice the output voltage (v pv1 = 2v out ), so i rms(max) = i load(max) /2. choose an input capacitor that exhibits less than +10 n c self-heating temperature rise at the rms input current for optimal long-term reliability. the input-voltage ripple is composed of d v q (caused by the capacitor discharge) and d v esr (caused by the esr of the capacitor). use low-esr ceramic capacitors with high ripple-current capability at the input. assume the contribution from the esr and capacitor discharge equal to 50%. calculate the input capacitance and esr required for a specified input voltage ripple using the following equations: esr in l out v esr i i 2 ? = ? + where: pv1 out out l pv1 sw (v v ) v i vfl ? ?= and: out in q sw i d(1 d) c vf ? = ? and out pv1 v d v = where i out is the maximum output current, and d is the duty cycle.it is strongly recommended that a 4.7 f f small footprint be placed close to pv1 and pv2 and a minimum of 100nf small footprint be placed close to pv. using a small foot - print such as 0805 or smaller helps to reduce the total parasitic inductance. output capacitor the minimum capacitor required depends on output voltage, maximum device current capability, and the error-amplifier voltage gain. use the following formula to determine the required output capacitor value: ? = = ref x eamp out(min) co out x cs out 167m vg c 2f v r 0.8vx 31.7 2 210khz v where f co , the target crossover frequency, is 210khz, g eamp , the error-amplifier voltage gain, is 31.7v/v, and r cs is 167m . pcb layout guidelines careful pcb layout is critical to achieve low switching losses and clean, stable operation. use a multilayer board whenever possible for better noise immunity and power dissipation. follow these guidelines for good pcb layout: 1) use a large contiguous copper plane under the device package. ensure that all heat-dissipating components have adequate cooling. the bottom pad of the device must be soldered down to this copper plane for effective heat dissipation and maximizing the full power out of the device. use multiple vias or a single large via in this plane for heat dissipation. 2) isolate the power components and high-current path from the sensitive analog circuitry. this is essential to prevent any noise coupling into the analog signals. 3) add small footprint blocking capacitors with low self- resonance frequency close to pv1, pv2, and pv. 4) keep the high-current paths short, especially at the ground terminals. this practice is essential for stable, jitter-free operation. the high-current path composed of input capacitors at pv1, pv2, inductor, and the output capacitor should be as short as possible. 5) keep the power traces and load connections short. this practice is essential for high efficiency. use thick copper pcbs (2oz vs. 1oz) to enhance full-load efficiency. downloaded from: http:///
max16961 3a, 2.2mhz, synchronous step-down dc-dc converter 11 maxim integrated 6) outs is sensitive to noise for devices with external feedback option. the resistive network (r1 and r2)and the capacitive network (c1 and c2) must be placed close to outs and far away from the lx_ node and high switching current paths. the ground node of r2 and c2 must be close to gnd. 7) the ground connection for the analog and power section should be close to the ic. this keeps the ground current loops to a minimum. in cases where only one ground is used enough isolation between analog return signals and high power signals must be maintained. chip information process: bicmos package information for the latest package outline information and land patterns (foot - prints), go to www.maximintegrated.com/packages . note that a ?+?, ?#?, or ?-? in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. package type package code outline no. land pattern no. 16 tqfn-ep t1644+4 21-0139 90-0070 16 tssop-ep u16e+3 21-0108 90-0120 downloaded from: http:///
max16961 3a, 2.2mhz, synchronous step-down dc-dc converter 12 maxim integrated ordering information note: ?_? is a package suffix placeholder for either ?r? or ?s?, as shown in the selector guide . the 2nd ?_? is in the option suffix. /v denotes an automotive qualified part.+ denotes a lead(pb)-free/rohs-compliant package. * ep = exposed pad. selector guide note: contact the factory for variants with different output-voltage, spread-spectrum, and power-good delay time settings. part temp range load current capability (a) pin-package max16961_ate_/v+ -40c to +125c 4 16 tqfn-ep* max16961_aue_/v+ -40c to +125c 4 16 tssop-ep* root part package suffix option suffix output voltage spread spectrum sync in/out max16961 raue a/v+ ext. adj. disabled in max16961 saue a/v+ ext. adj. enabled in max16961 rate a/v+ ext. adj. disabled in max16961 sate a/v+ ext. adj. enabled in downloaded from: http:///
max16961 3a, 2.2mhz, synchronous step-down dc-dc converter maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated 160 rio robles, san jose, ca 95134 usa 1-408-601-1000 13 ? 2015 maxim integrated products, inc. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. revision history revision number revision date description pages changed 0 11/12 initial release ? 1 4/13 added non-automotive parts to selector guide 11 2 9/13 updated input voltage high min spec and input voltage low max spec, figure 2, equation, step 6 in the pcb layout guidelines section, and the ordering information 3?5, 10, 11 3 5/14 added fb regulation voltage specifications and updated v pv condition in electrical characteristics table; corrected equations and updated table 2 in the inductor selection and output capacitor sections; updated ordering information 2, 3, 9?11 4 6/15 updated general description section to make it clear that factory needs to be contacted for fixed output-voltage trim options 1 5 7/15 added formula to equation in the setting the output voltage section, replaced the output capacitor section, and deleted table 2 9, 10 downloaded from: http:///

▲Up To Search▲

Price & Availability of MAX16961RAUEAV

	To Download MAX16961RAUEAV Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .